
Introduction
High-efficiency, high-performance chips are the core technologies driving the development of artificial intelligence and represent the strategic frontier in the global competition of integrated circuits. This project focuses on the construction of novel high-efficiency, high-performance memristor-based computing-in-memory chips and systems, achieving breakthroughs in memristor material system, device structure, and circuitry architecture.
Synergistic Innovation in 'Materials-Devices-Architectures' for Memristor-Based In-Memory Computing
The memristor is a novel device that integrates both storage and computing functions. Memristor-based computing-in-memory (CIM) computing chips avoid the data transfer between memory and processing units, thereby opening a new pathway for the development of high-performance chip technologies in the post-Moore era and becoming the international frontier in integrated circuits. Exploring high-precision memristor materials, highly scalable device stacks, as well as spatial architectures with high array-level parallelism, are keys to building efficient CIM chips. However, memristor conductance modulation involves complex electroionic coupling transport mechanisms, and how to overcome the limitations of conventional memory-compute separated architectures in devices and chips has long been a fundamental and global challenge.
This project addresses the challenge from the perspectives of memristor material systems, device structures, and circuit architectures. By deeply elucidating the mechanisms of conductance modulation, the physical origins of variability, and the factors influencing array-level parallelism, the group innovatively proposed composite oxide materials, stacked device structures, and spatially parallel computing circuit architectures, achieving significant improvements in energy efficiency. A theoretical framework and practical methodology for constructing high-efficiency, high-performance CIM chips have been established, leading to the successful development of multiple prototypes. These advances open a new pathway for the evolution of computing chips in the post-Moore era.
Construction of Energy-Efficient Computing-In-Memory Chip and System
The team led by Professor Huaqiang Wu and He Qian from Tsinghua University discovered the correlation between the nanoscale oxygen vacancy distribution morphology and the memristor conductance modulation precision. The project elucidated the mechanism of linear changes in the conductance of memristor materials under the action of voltage pulses, and developed a novel memristor material system of composite oxide Hf?Al?O_z, solving the scientific challenge of precise modulation of oxygen vacancy distribution. It is hence achieved a giant leap from single bit to continuous linear conductance modulation.
In addition, the team identified the random migration of unstable oxygen vacancies inside the memristor as the physical cause of device variability. Moreover, a novel stacked device structure of thermal enhanced layer/resistive switching layer was proposed. This provided an effective method for regulating the internal electric field and thermal distribution of the device, achieving a significant boost of the integration scale from Kb to tens of Mb.
Furthermore, this project revealed the error accumulation effects as the key factor determining the parallelism of CIM architecture. Based on this, a spatially parallel CIM architecture with hybrid training framework and differential mapping mechanism was established. The feasibility and high-energy-efficiency advantage of the fully parallel CIM architecture was verified. For the first time, a fully hardware implemented multi-array memristor CIM system was demonstrated, showing two orders of magnitude higher energy efficiency than GPU. E. Eleftheriou, a member of the US National Academy of Engineering, cited this project, stating: 'The state-of-the-art experimental demonstrations of DNN inference based on in-memory computing...'
The theory of memristor-based CIM architecture has gained wide international recognition
The project has established a theoretical and methodological framework for constructing high-efficiency, high-performance memristor-based CIM chips, opening a new pathway for computing chip technologies in the post-Moore era. The project has been cited by universities and companies from 61 countries and regions, including MIT, IBM, and TSMC, and has been included five times by IRTS/IRDS (International Roadmap for Devices and Systems), affirming the innovations in device structures and the pioneering achievement in CIM architecture: Neural network inference acceleration fully implemented in hardware based on memristors; 'Thermally enhanced layers regulate the resistive switching process, achieving nanoscale oxide memristors with multi-bit precision'; HfO/Al?O? resistive switching materials effectively reduce oxygen ion diffusion and improve device stability. Based on these achievements, the research team was invited to write eight review articles in journals such as Nature Electronics, Nature Communications, and Proceedings of the IEEE, of which five were selected as ESI highly cited papers. The project has received the 2022 First Prize of the Natural Science Award from the Chinese Institute of Electronics, was recognized as one of the Top Ten Semiconductor Research Advances in China in 2020, and received the highest award - SAIL Award - at the 2020 World Artificial Intelligence Conference. It is also a recipient of the 2025 First Prize of the Natural Science Award from the Ministry of Education.
The World Internet Conference (WIC) was established as an international organization on July 12, 2022, headquartered in Beijing, China. It was jointly initiated by Global System for Mobile Communication Association (GSMA), National Computer Network Emergency Response Technical Team/Coordination Center of China (CNCERT), China Internet Network Information Center (CNNIC), Alibaba Group, Tencent, and Zhijiang Lab.